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CoWoS
Technology
Packaging
TSMC's 2.5D packaging — the assembly step that rationed the world's GPUs.
You're looking at a technology record: a building block of AI hardware — what it does, who makes it, and which chips and systems use it.
Chip-on-Wafer-on-Substrate mounts GPU dies and HBM stacks side by side on a silicon interposer. Every NVIDIA and AMD flagship uses it, and during 2023–24 CoWoS capacity — not wafer supply — was the binding constraint on global GPU output, forcing TSMC to multiply capacity several-fold. CoWoS-L, with local silicon bridges in an organic interposer, carries Blackwell and Rubin's ever-larger assemblies.
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Record reviewed as of 2026-01-15 — see Methodology.