Google TPU v4
芯片
AI加速器
上一代
The TPU generation that proved optical circuit switching at 4,096-chip scale.
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TPU v4 pods connected 4,096 chips through reconfigurable optical circuit switches — Google's bet that the network, not the chip, defines a training machine. PaLM was trained across two v4 pods. Its published 275 BF16 TFLOPS per chip trailed contemporary GPUs, but pod-scale efficiency was the point.
规格与关键参数
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Overview
Designer
Google
Family
Tensor Processing Unit
Deployed
2020; described publicly 2021–2023
内存
Memory
32 GB HBM2Vendor spec
Memory bandwidth
1.2 TB/sVendor spec
算力
BF16
275 TFLOPSVendor spec
INT8
275 TOPSVendor spec
电力
Typical chip power
~192 W (paper figure)Published paper
Physical
Pod scale
4,096 chips via optical circuit switchingPublished paper
它如何与整个技术栈相连
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内存技术
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来源
记录审阅截至 2026-01-15 — 查看 方法论.