Google TPU v4
The TPU generation that proved optical circuit switching at 4,096-chip scale.
You're looking at a chip record: what this processor is, its key specs, who designs, manufactures and supplies its parts, and where it gets used.
TPU v4 pods connected 4,096 chips through reconfigurable optical circuit switches — Google's bet that the network, not the chip, defines a training machine. PaLM was trained across two v4 pods. Its published 275 BF16 TFLOPS per chip trailed contemporary GPUs, but pod-scale efficiency was the point.
Specifications & key facts
Each figure is labeled by basis: vendor spec, vendor claim, reported, estimate, or official. "Not publicly disclosed" means exactly that — we never invent values.
Overview
Memory
Compute
Power
Physical
How this connects to the rest of the stack
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Memory technology
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Sources
Record reviewed as of 2026-01-15 — see Methodology.