★
Menu
Home How It's Built Watchlist The Stack
Hardware ChipsCompare Chips Servers & SystemsNetworking MemoryFoundries & Packaging Cooling
Facilities Data CentersPower ProjectsCloud & GPU Compute
Intelligence AI ModelsSoftware AI ProductsBenchmarks Research PapersDatasets Concepts
Ecosystem CompaniesStocks PeopleTimeline TrendsFuture of AI
Learn News Ask the Data AI Agents
About About us Methodology Data & API Disclaimer
Options
DATA & API

Free read-only JSON access to the site's cached data.

Dark mode

Guided View
New to chips, data centers and model jargon? We explain key terms as you browse, in plain English. Same data, with the help built in.

Expert View
You already know the stack. Just the data: clean, fast and compact, with no extra explanations. This is the default view.

Interface language
‹ Back
Home › Technologies › TSMC N2 (2 nm)

TSMC N2 (2 nm)

Technology Process Node

Gate-all-around arrives: volume production from late 2025.

You're looking at a technology record: a building block of AI hardware — what it does, who makes it, and which chips and systems use it.

N2 is TSMC's first gate-all-around nanosheet node, entering volume production in late 2025 with reported record tape-out demand — the process the 2027 accelerator generation will compete for. A16, with backside power delivery, follows in late 2026.

How this connects to the rest of the stack

This record's links at a glance — click a group to jump to it.

Maintained by

Successor to

Sources

TSMC technology ↗

Record reviewed as of 2026-01-15 — see Methodology.