Huawei Ascend 910C
China's frontier chip under sanctions: two 910B dies, SMIC 7 nm, no EUV.
You're looking at a chip record: what this processor is, its key specs, who designs, manufactures and supplies its parts, and where it gets used.
The Ascend 910C pairs two 910B dies to reach roughly H100-class training compute — reported around 800 BF16 TFLOPS — fabricated at SMIC on 7 nm-class DUV multi-patterning because EUV tools are export-banned. Yields and HBM supply are its reported constraints. Huawei's CloudMatrix 384 system lashes 384 of them together with optical links, trading power for scale. Most figures are analyst estimates; Huawei publishes little.
Specifications & key facts
Each figure is labeled by basis: vendor spec, vendor claim, reported, estimate, or official. "Not publicly disclosed" means exactly that — we never invent values.
Overview
Manufacturing
Compute
Memory
Physical
How this connects to the rest of the stack
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Designed by
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Competes with
Related
Sources
SemiAnalysis on CloudMatrix (April 2025) ↗
Record reviewed as of 2026-01-15 — see Methodology.