Google TPU v6e (Trillium)
Chip
AI Accelerator
Shipping
The sixth generation: ~4.7x v5e compute, used to train Gemini 2.0.
You're looking at a chip record: what this processor is, its key specs, who designs, manufactures and supplies its parts, and where it gets used.
Trillium raised per-chip compute about 4.7x over v5e with doubled HBM capacity and bandwidth, and Google stated Gemini 2.0 was trained on it. It became generally available in December 2024 and anchors Google's inference fleet alongside Ironwood.
Specifications & key facts
Each figure is labeled by basis: vendor spec, vendor claim, reported, estimate, or official. "Not publicly disclosed" means exactly that — we never invent values.
Overview
Designer
Google
Announced
May 2024; GA December 2024
Memory
Memory
32 GB HBM, 1.6 TB/sVendor spec
Compute
BF16
918 TFLOPSVendor spec
Improvement
~4.7x v5e peak compute per chipVendor claim
Physical
Pod scale
256 chips per pod, multi-pod via Jupiter fabricVendor spec
How this connects to the rest of the stack
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Designed by
Available from
Succeeded by
Successor to
Competes with
Sources
Record reviewed as of 2026-01-15 — see Methodology.