Google TPU v5p
The training TPU behind Gemini 1.0 — 8,960-chip pods.
You're looking at a chip record: what this processor is, its key specs, who designs, manufactures and supplies its parts, and where it gets used.
Google's performance TPU of the Gemini era: 459 BF16 TFLOPS and 95 GB of HBM per chip, scaled into pods of 8,960 chips over its inter-chip interconnect. Gemini 1.0 was trained on TPU v4 and v5p fleets — evidence that frontier models could be built entirely off NVIDIA hardware.
Specifications & key facts
Each figure is labeled by basis: vendor spec, vendor claim, reported, estimate, or official. "Not publicly disclosed" means exactly that — we never invent values.
Overview
Memory
Compute
Physical
How this connects to the rest of the stack
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Designed by
Memory technology
Found inside
Supported by
Used to train
Available from
Succeeded by
Successor to
Competes with
Sources
Record reviewed as of 2026-01-15 — see Methodology.