{"data":{"slug":"pcie","etype":"tech","name":"PCI Express","cat":"Networking","subtitle":"The universal socket: how accelerators, NICs and CPUs meet.","summary":"PCIe 5.0 (32 GT/s per lane) hosts today's accelerator cards and 400G NICs; PCIe 6.0 doubles that with PAM4 signaling and arrives with the 2026 platform generation. Retimer chips (Astera, Broadcom) stretch its reach across big chassis.","attrs":null,"kf":null,"aliases":["PCIe","PCI-E","PCIe 6.0"],"ticker":null,"exchange":null,"hq":null,"founded":null,"website":null,"status":null,"region":null,"asof":"2026-01-15","sources":[{"url":"https://pcisig.com/","label":"PCI-SIG"}]},"meta":{"found":true,"count":1,"served_from":"site cache (no live upstream calls)","as_of":"2026-10-14T08:41:29+00:00","disclaimer":"Research and information only — not investment advice. Structured records carry basis labels (vendor spec / reported / estimate); market quotes are delayed/indicative.","attribution":"Records compiled from vendor documentation, official filings and reputable public reporting; market quotes via financial data providers. See /data-sources."}}