{"data":{"slug":"hbm","etype":"tech","name":"High-Bandwidth Memory (HBM)","cat":"Memory","subtitle":"Stacked DRAM wired straight to the GPU — the scarcest commodity in AI.","summary":"HBM stacks DRAM dies vertically, connects them with thousands of through-silicon vias, and mounts the stack millimeters from the processor on a silicon interposer. The result is terabytes per second of bandwidth that ordinary DIMMs cannot approach — and because model inference is mostly memory-bound, HBM capacity and bandwidth, not FLOPS, usually decide real AI performance. Only SK hynix, Samsung and Micron make it, and supply has been sold out roughly a year ahead throughout the boom.","attrs":[{"g":"Overview","l":"Suppliers","v":"SK hynix, Samsung, Micron"},{"g":"Overview","l":"Generations","v":"HBM (2015) → HBM2 → HBM2E → HBM3 → HBM3E → HBM4"},{"g":"Overview","l":"Why it matters","v":"LLM inference throughput scales with memory bandwidth more than with compute"}],"kf":null,"aliases":["High Bandwidth Memory"],"ticker":null,"exchange":null,"hq":null,"founded":null,"website":null,"status":null,"region":null,"asof":"2026-01-15","sources":[{"url":"https://www.jedec.org/","label":"JEDEC HBM standards"}]},"meta":{"found":true,"count":1,"served_from":"site cache (no live upstream calls)","as_of":"2026-10-14T04:30:28+00:00","disclaimer":"Research and information only — not investment advice. Structured records carry basis labels (vendor spec / reported / estimate); market quotes are delayed/indicative.","attribution":"Records compiled from vendor documentation, official filings and reputable public reporting; market quotes via financial data providers. See /data-sources."}}